GIGABYTE
GIGABYTE R163-Z32-AAC1 barebone server 12-bay 2.5" Gen4 NVMe/SATA/SAS AMD EPYC 9004 1U
1U barebone server holds twelve 2.5" Gen4 NVMe/SATA/SAS hot-swap bays and supports a single AMD EPYC 9004 processor with twelve-channel DDR5 memory
- Single AMD EPYC 9004 processor powers demanding workloads
- 12 hot-swap 2.5" bays support Gen4 NVMe SATA SAS drives
- 12-channel DDR5 RDIMM with 12 DIMM slots maximises memory bandwidth
- Dual FHHL PCIe Gen5 x16 plus two OCP NIC 3.0 slots enable high-speed expansion
- Dual ROM architecture adds firmware resilience for uptime
GIGABYTE 1U 12-bay barebone
This barebone server fits a single AMD EPYC 9004 processor in a 1U chassis. It provides twelve 2.5-inch hot-swap bays that accept NVMe, SATA or SAS drives. The platform targets builders who need dense Gen4 storage with a single-socket CPU.
Gen4 NVMe lane limits
Twelve front bays share the CPU Gen4 lanes, so populating every bay with NVMe drives consumes the available bandwidth. The single M.2 slot uses a PCIe Gen3 x4 link and does not add Gen4 throughput. Builders who want more storage than twelve bays provide must look elsewhere.
Single-socket EPYC 9004 platform
The board supports one EPYC 9004 series processor with twelve DDR5 RDIMM channels across twelve DIMM slots. Two full-height PCIe Gen5 x16 slots and two OCP NIC 3.0 Gen5 x16 slots handle add-in cards. A dual-socket configuration is not possible on this chassis.
Highlights
- Single AMD EPYC 9004 processor powers demanding workloads
- 12 hot-swap 2.5" bays support Gen4 NVMe SATA SAS drives
- 12-channel DDR5 RDIMM with 12 DIMM slots maximises memory bandwidth
- Dual FHHL PCIe Gen5 x16 plus two OCP NIC 3.0 slots enable high-speed expansion
- Dual ROM architecture adds firmware resilience for uptime
Specifications
No published specifications for this item yet.
Questions about this item
How do I decide between the 12 NVMe bays and the single M.2 slot for my boot drive?
Use the 12 front 2.5" bays for hot-swap NVMe, SATA or SAS storage; the M.2 slot with PCIe Gen3 x4 is intended for a compact boot device.
What does the 12-channel DDR5 design mean once the server is populated?
Each of the 12 DIMM slots connects to a dedicated memory channel on the EPYC 9004 processor, so filling all slots delivers maximum memory bandwidth.
How do the two OCP NIC 3.0 slots and two FHHL slots share PCIe Gen5 x16 bandwidth?
Both OCP NIC 3.0 slots and both FHHL slots are wired as PCIe Gen5 x16, giving each slot a full x16 link to the CPU for networking or accelerator cards.
New to this? Buying server hardware with crypto — what to check, what it costs to pay, and what is never asked for.
Also in this aisle
People compared these
Same shelf, same checkout — eight coins and a 30-minute rate lock.



