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Refurbished Intel Xeon server CPU in green ceramic package with gold contact pads and silver heat spreader

IBM

IBM 46W2715 Xeon E5-2670 v2 10-core 2.5 GHz server processor

SKU CH-NJ8K-5P7GZ MPN 46W2715

Ten-core Xeon server processor running at 2.5 GHz with 25 MB L3 cache, 8.0 GT/s QPI, DDR3-1866 memory support and 115 W TDP in an FCLGA2011 socket

  • Integrated Memory Controller SpeedDDR3 1866
  • 10 cores at 2.5 GHz for multi-threaded server workloads
  • 25 MB L3 cache reduces latency on data-intensive tasks
  • 0 GT/s QPI speed enables fast inter-processor communication
  • Supports DDR3-1866 memory for balanced throughput

Refurbished 10-core Xeon for FCLGA2011 servers

This IBM 46W2715 processor delivers ten cores at 2.5 GHz with 25 MB L3 cache and an 8.0 GT/s QPI link. Built on a 22 nm process, it has a 115 W TDP and an integrated DDR3-1866 memory controller. The chip fits socket FCLGA2011 and is supplied as a processor only.

Suits dual-socket refreshes needing DDR3-1866

Ideal for administrators upgrading existing FCLGA2011 platforms that require ten cores and 25 MB cache within a 115 W envelope. The refurbished condition means the unit has been tested but shows prior use. Buyers needing a new-in-box warranty or a different core count should consider other options.

Highlights

  • 10 cores at 2.5 GHz for multi-threaded server workloads
  • 25 MB L3 cache reduces latency on data-intensive tasks
  • 0 GT/s QPI speed enables fast inter-processor communication
  • Supports DDR3-1866 memory for balanced throughput

Specifications

Integrated Memory Controller SpeedDDR3 1866
Shipping weight0.91 kg
Package size127 × 127 × 51 mm

Questions about this item

What does the 10-core 2.5 GHz specification mean for actual server throughput?

Ten cores running at 2.5 GHz with 25 MB L3 cache let the processor handle many parallel threads, so virtualization hosts and database servers can run more concurrent workloads without queuing.

What does the 8.0 GT/s QPI speed limit in a multi-socket system?

The 8.0 GT/s QPI link sets the maximum data rate between sockets, capping inter-socket bandwidth for memory access and cache coherency traffic in dual-processor configurations.

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